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Fig. 1.
Fig. 1. (Color online) (a) Schematic diagram of water gating by a platinum bar for graphene FET with Ti electrodes. (b) Topography image of graphene FET in contact with Ti electrodes on an SiO2/Si substrate. Here it was utilized highly doped silicon substrate for applying back-gate voltage, VBG.
Applied Science and Convergence Technology 2019;28:226~228 https://doi.org/10.5757/ASCT.2019.28.6.226
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