Fig. 3. (a) Optical image of graphene FET with Cr/Au electrodes on the SiO₂ substrate. (b) The schematic diagram for R_{(i, j)} between i and j-electrodes.

Applied Science and Convergence Technology 2020;29:180~182 https://doi.org/10.5757/ASCT.2020.29.6.180

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