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Fig. 3. IV curves of (a) case 1, threshold switching, and (c) case 2, resistive memory switching, and the schematic of the conduction mechanisms of (b) case 1 and (d) case 2.
Applied Science and Convergence Technology 2024;33:104~107 https://doi.org/10.5757/ASCT.2024.33.4.104
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