Applied Science and Convergence Technology 2023; 32(6): 155-157
Published online November 30, 2023
https://doi.org/10.5757/ASCT.2023.32.6.155
Copyright © The Korean Vacuum Society.
Department of Electronics Engineering, Dong-A University, Busan 49315, Republic of Korea
Correspondence to:mpark@dau.ac.kr
This is an Open Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (https://creativecommons.org/licenses/by-nc-nd/4.0/) which permits non-commercial use, distribution and reproduction in any medium without alteration, provided that the original work is properly cited.
The current study focuses on examining the high-current performance of InP/GaAsSb/InGaAs double heterojunction phototransistors (DHPTs) operating at a wavelength of 1.55
Keywords: InP/GaAsSb/InGaAs, Double heterojunction phototransistors, Type-II band alignment, High-current operation
Heterojunction phototransistors (HPTs) have garnered considerable attention for their applications in optical receivers within lightwave communication systems [1,2] and as integral components for optoelectronic mixers/modulators in microwave photonic systems [3]. Notably, HPTs have found utility in the realm of infrared camera pixels for low-light imaging systems [4,5]. The inherent advantages of HPTs, such as high optical gain without impact ionization, intrinsic non-linear optical performance, and seamless on-chip integration with electronic circuits, underscore their appeal in diverse applications. However, as collector current levels escalate, there is an evident decline in the optical gain (
To overcome these challenges, we have devised DHPTs employing type-II heterojunctions of GaAsSb/InP and GaAsSb/InGaAs. The substantial valence band discontinuity at the InP/GaAsSb emitter–base (E-B) and GaAsSb/InGaAs B-C junctions imparts a robust hole blocking property, facilitating elevated power output characteristics at minimal bias voltage. The valence band offset inherent in the type-II B-C heterostructure delays the onset of base push-out at increased collector current levels. Although Memis
To optimize the optical performance of the DHPTs, we implemented an emitter-ledge passivation process in the device fabrication. The InP emitter-ledge structure, transparent to 1.55 µm lightwave, effectively mitigates base surface recombination current [9]. This study presents a demonstration of the high-current characteristics of InP/GaAsSb/InGa-As DHPTs operating at low bias voltages. Comparative analyses between DHPTs with and without the ledge structure are conducted to scrutinize the impact of the emitter-ledge structure. The observed maximum optical power level at which
The epitaxial layers constituting the DHPTs were meticulously grown on an n+-InP substrate through the precision of a molecular beam epitaxy system. Table I presents the schematic of the device structure. Notably, an InP emitter serves as the ledge structure for surface passivation. The design incorporates a 1 µm-thick InGaAs collector layer strategically engineered to attain an external quantum efficiency, reaching 50 % at a wavelength of 1.55 µm when the HPTs operate in p-i-n mode. Schematic depictions of the DHPTs-with the ledge layer (WL) and without the ledge layer (WOL) are presented in Figs. 1(a) and 1(b), respectively. A SiNx thin film, employed for anti-reflection coating in both devices, additionally functions as a passivation layer for the exposed base of the DHPTs-WOL. Fabrication of DHPTs with a 50 µm-diameter optical window was accomplished through standard optical contact lithography and a selective wet etching process. Nonalloyed Ti-Pt-Au (20/30/200 nm) metallization was evaporated and lifted off for the emitter contact on the top surface and for the collector contact on the backside of the substrate. An InGaAs cap layer and an InP emitter layer were etched with solutions of H3PO4:H2O2:H2O and H3PO4:HCl, respectively. To ensure passivation of the surface in DHPTs-WL, the InP layer was deliberately preserved on the extrinsic base. A 200 nm-thick SiNx film, deposited by plasma-enhanced chemical vapor deposition at 300 °C, played a pivotal role in this configuration. Mesa isolation etching was executed from the SiNx film down to the InGaAs collector layer, following the protection of the optical window using a photoresist. In a comparative assessment of the
Table 1 . Layer structure of type-II InP/GaAsSb/InGaAs DHPTs..
Layer | Material | Dopant | Doping (cm−3) | Thickness (nm) |
---|---|---|---|---|
Emitter cap | n+ InGaAs | Si | 2 × 1019 | 100 |
Emitter | n+ InP | Si | 3 × 1019 | 50 |
Emitter | n− InP | Si | 3 × 1017 | 70 |
Base | p+ GaAsSb | C | 1 × 1019 | 20 |
Collector | n− InGaAs | Si | 3 × 1016 | 1,000 |
Subcollector | n+ InP | Si | 1 × 1019 | 300 |
n+ InP Substrate |
Figure 2(a) presents the collector dark current (
Figure 2(a) further illustrates the collector photocurrent (
Figure 3 plots the β of the DHBT against the optical gain,
In summary, our study successfully demonstrated a DHPT employing a type-II heterostructure composed of InP/GaAsSb and GaAs-Sb/InGaAs. At low bias voltages, the fabricated DHPTs operate effectively, exhibiting a robust collector current condition attributed to the commendable confinement of holes within the base layer. Particularly, DHPTs-WL effectively averted the degradation of optical gain until
This research was supported by the National Research Foundation of Korea (NRF) grant funded by the Korean government (MSIT) (NO.2020R1C1C1004971).
The authors declare no conflicts of interest.