Advancements in wireless communication technologies and the development of long-range detection radar systems have significantly expanded the radio frequency (RF) market. Among the critical components driving this growth, high-power amplifiers (HPAs) play a vital role in enabling long-range transmission. Gallium nitride (GaN) has emerged as a highly suitable material for RF HPAs owing to its exceptional material properties, including high breakdown field, high carrier concentration, and excellent electron mobility. These characteristics make GaN-based devices ideal for satisfying the stringent demands of high-power RF applications [1–3]. Consequently, substantial research has been devoted to the development and optimization of GaN-based power amplifiers [4–8]. Their ability to operate efficiently at high frequencies and high-power levels is promising for modern RF system designs. However, the high-power operation of these devices inevitably causes significant thermal challenges [9,10]. The dissipation of excess heat generated during operation limits its optimal performance and reliability [11]. Consequently, improving the thermal management of GaN-based power amplifiers has become an area of interest in both academic and industrial research.

Traditional cooling methods for RF devices often rely on indirect approaches, such as cold plates or forced air cooling to manage thermal loads [12–14]. Building on Tuckerman and Pease’s pioneering work on microchannels, researchers have explored direct cooling strategies to minimize the conduction thermal resistance by embedding microchannels directly into device substrates [15–19]. Recent studies focused on manifold microchannel designs to achieve uniform heat dissipation and reduce pressure drops by optimizing fluid flow paths [20– 22]. However, these high-performance thermal management structures have been applied to automotive power converters and datacenter computing systems, with limited adaptation to RF devices. The compact size of the RF power amplifiers necessitates new design principles for implementing direct cooling systems. Additionally, the distinct geometry of the heat-generating areas in RF power amplifiers, compared with other power semiconductors, requires thermal management solutions tailored to their unique characteristics.

In this study, computational simulations were conducted to evaluate thermal performance improvements in manifold microchannels specifically designed for RF power amplifiers. An RF GaN high electron mobility transistor (HEMT) power amplifier was used as a model to analyze the thermal and hydraulic performances across the three embedded microchannel designs with various channel configurations. In addition, a GaN HEMT power amplifier with an integrated microchannel structure is fabricated to assess the practical manufacturability and performance of different channel configurations, providing valuable insights into the feasibility of implementing such designs in RF devices.

2.1. Thermal hydraulic modeling

Computational fluid dynamics simulations were performed using ANSYS Fluent v19.2. Figure 1 shows a schematic of the simulation setup. The RF GaN HEMT power amplifier was modeled with a total gate width of 4.8 mm, comprising 40 gates, each with a unit gate width of 120 µm, based on a single transistor bar. Heat generation was assumed to occur in the depletion region between the gate and source, with a gate length of 0.5 µm, as referenced in [23,24]. The die size was set to 4.5 mm × 3.0 mm to account for the bonding area required for practical fabrication. Two analyses were conducted to optimize the thermal performance: one examined the effect of channel width (W_ch) variations on the thermal performance, and the other focused on optimizing the performance with respect to the silicon carbide (SiC) substrate thickness (t_SiC). The channel width was varied from 50 to 200 µm, while all other parameters were held constant. The t_SiC was initially set to 100 µm and the thermal performance of various channel designs was compared. Based on the W_ch = 100 µm channel structure, substrate thickness optimization was performed. The detailed geometrical parameters are summarized in the Table I. Here, the fin width (W_fin), the microchannel height (H_ch), and the microchannel length (Lch) are represented. Additionally, the GaN thickness (t_GaN), the manifold width of the package (W_mani), and the manifold height (Hmani) are also represented.

Figure 1. (a) The detailed device structure used for computational fluid dynamics simulation. (b) Overall view of the computational fluid dynamics structure and material properties.

Table I. Geometrical parameters of the manifold microchannel structure in µm..

Wch	Wfin	Hch	Lch	tSiC	tGaN	Wmani	Hmani
50, 100, 200	50	100	1,000	50 – 150	1.8	300	1,000

A mass-flow inlet boundary condition was applied to the inlet, defined by a volumetric flow rate (Q) ranging from 10 to 50 ml/min, and the pressure P outlet was set to 0 kPa. A constant heat flux (q″) of 25.6 kW/cm² was applied to the active area (1.56 mm × 0.12 mm). The turbulence model was selected based on prior studies, with the k-ε model and enhanced wall treatment employed, as it is well-suited for manifold microchannel structures [25,26].

The analysis results were evaluated based on the maximum chip temperature and pumping power, with the pumping power (P_pump) calculated as the product of the volumetric flow rate and pressure difference.

2.2. Fabrication of embedded channel on SiC substrate

Based on a computational study, a GaN HEMT device with an embedded microchannel structure was fabricated. The fabrication process is illustrated in Fig. 2. First, the device was mounted on a carrier wafer using wax to ensure protection, and the SiC substrate was ground to a thickness of 200 µm. Thereafter, the residual particles were cleaned sequentially with acetone, isopropyl alcohol, and deionized (DI) water, followed by additional cleaning via ashing and DI water cleaning. For electroplating, a base metal layer of Ti/Au (3/8 nm) was deposited via e-beam evaporation. The microchannel was patterned using photolithography, followed by nickel electroplating. The photoresist was removed in the following sequence: Acetone, isopropyl alcohol, DI water, ashing, and DI water. The SiC was etched using inductively coupled plasma dry etching with sulfur hexafluoride (SF6) gas. The etch steps were varied as follows: 100 µm (1 step), 10 µm (10 steps), and 5 µm (20 steps). After etching, Ni was removed using a nitric acid:DI water solution (1:2 ratio), Au was removed using an Au etchant, and Ti was removed using a buffer oxide etchant:DI water solution (6:1 ratio). Finally, the etching residues were removed through ultrasonic cleaning in a hydrochloric acid:DI water solution (1:2 ratio), and the carrier wafer was detached using a hot plate.

Figure 2. Etching process of SiC microchannel.

3.1. Result of thermal performance with various flowrate

Figure 3 shows the results of the thermal performance analysis of the manifold microchannel-embedded RF device based on W_ch and P_pump. Using this manifold microchannel cooling structure, the operating temperature could be maintained below 225 ° under high-heatgeneration conditions. At lower P_pump levels, the thermal performance improved significantly; however, as P_pump increased to higher levels, the improvement in thermal performance became negligible, despite a substantial increase in the flowrate. For the same P_pump, smaller W_ch values indicated better performance. This is because a smaller channel width increases the heat exchange surface area, thereby improving efficiency. Moreover, a smaller channel width causes an increase in flow velocity, which enhances the impingement effect on the heat-generated region. At a P_pump of 80 – 90 mW, where thermal performance has saturated, the device shows a temperature difference of 28.3 °C between W_ch of 50 and 200 µm.

Figure 3. Thermal performance analysis results based on W_ch variation.

Figure 4 shows the fluid velocity contour for the case with W_ch = 50 and 200 µm at P_pump of 80.7 – 90.4 mW. The contour indicates that the fluid directly impinges below the heat-generating region of the RF power amplifier, which features a narrow and elongated heatdissipation area that enhances thermal performance. At the maximum velocity in the microchannel, where impingement was induced by the manifold wall increased from 12.4 to 13.8 m/s, the device temperature dropped from 247.7 to 219.4 °C, owing to increased P_pump contributes to the variation in thermal performance.

Figure 4. Hot spot impingement effect based on channel width. Fluid velocity contour of (a) W_ch = 50 µm and (b) W_ch = 200 µm.

Figure 5 shows the thermal performance optimization results for a microchannel with W_ch = 50 µm and W_fin = 50 µm as a function of the SiC substrate thickness. The analysis was conducted with substrate thicknesses ranging from 25 to 150 µm, and the P_pump was varied from 6.0 to 80.7 mW. For a lower P_pump, which corresponds to a lower thermal performance, optimal thermal performance was achieved with a thicker substrate. However, for higher P_pump, which corresponds to better thermal performance, optimal performance was observed with a thinner substrate (tSiC = 100 µm). The temperature reduction owing to an increase in t_SiC had a significant impact at a low P_pump of 0.8 mW. At P_pump levels above 6 mW, when t_SiC exceeds 100 µm, the temperature difference was observed to be less than 1 °C.

Figure 5. Analysis of optimal substrate thickness based on thermal performance.

3.2. Fabrication of embedded microchannel GaN HEMT transistor

Figure 6 shows the micropillars formed during fabrication. Figure 6(a) shows that the etching by-products accumulated in the micropipes, forming micropillars. During the etching process, the SF6 gas used for etching becomes concentrated in the micropipes, causing the temperature to increase further in these regions. This causes an increase in the etching rate. Excessive byproducts generated at higher etch rates accumulate in the micropipes, forming structures resembling micropillars. The detailed mechanism of micropillar formation is explained in the study by Okamoto et al. [27]. Figure 6(b) displays a scanning electron microscope (SEM) image of micropillar and Fig. 6(c) shows the results of energy-dispersive X-ray spectroscopy (EDS) analysis performed to identify the composition of the micropillars. The EDS analysis revealed that the micropillars were composed of Si, C, and F, indicating that they were impurities formed by the reaction of SiC and F during the etching of SiC, which is consistent with the findings of Okamoto’s research. The number of etching steps was increased to suppress the formation of micropillars. Between steps, the Descum process was conducted to clean the excessively generated byproducts, and sufficient time was allowed for the device to cool.

Figure 6. (a) SEM image of micropipe and micro pillar. (b) SEM image for EDS analysis and (c) EDS result.

Figure 7(a) presents optical microscopy images of the GaN HEMT device depending on the etching step. The sample was fabricated under the original etching conditions, resulting in the formation of micropillars. Figure 7(b) shows an image etched in steps of 10 µm, while Fig. 7(c) shows an image etched in steps of 5 µm. By increasing the etching step and frequently performing the descending process, the formation of micropillars was effectively suppressed. Figure 8 shows the SEM images of the final GaN-on-SiC HEMT device with a microchannel structure. In particular, Fig. 8(a) shows that the fabricated microchannel achieved a W_ch of 97 – 99 µm and a W_fin of 50 – 52 µm, while Fig. 8(b) confirms an H_ch of 91 – 92 µm and a t_SiC of 101 – 103 µm. These results demonstrate that the microchannels were fabricated with the desired dimensions, ensuring effective integration of the microchannel structure into the GaN HEMT device.

Figure 7. Microchannel optical image of (a) etch step = 100 µm, (b) 10 µm, and (c) 5 µm.

Figure 8. (a) Measurement of channel width and fin width using top-view SEM image. (b) Measurement of SiC substrate height and channel height using sideview SEM image.

In this study, a thermal performance analysis and manufacturability validation were conducted to develop a manifold microchannel structure on a GaN-on-SiC device. Thermal-hydraulic optimization focuses on variations in the channel width and substrate thickness. The analysis revealed that smaller W_ch values enhanced the thermal performance of the same P_pump owing to the increased heat exchange area between the fluid and device. Manufacturability was evaluated for the embedded manifold microchannel structures in GaN HEMT RF amplifiers. During fabrication, larger etching steps were found to cause etching byproducts to accumulate in the micropipes, resulting in micropillar formation. Pillar-free microchannels were successfully fabricated by optimizing etching steps. The fabricated device confirmed that the design parameters derived from the analysis were implemented accurately, validating the proposed design and fabrication methodology.

This study was supported by the Civil Military Technology Cooperation Program (Grant No. 19-CM-BD-05).

The authors declare no conflicts of interest.