The effect of process temperature of a final annealing step in the fabrication of phase change memory (PCM) devices was investigated. Discrete PCM devices employing Ge₂Sb₂Te? (GST) films as an active element were made in a pore-style configuration, and they were annealed at various temperatures ranging from 160 to 300℃. The behaviors of cell resistance change from SET resistance to RESET resistance were totally different according to the annealing temperatures. There was a critical annealing temperature for the fabrication of normal PCM devices and abnormal operations were observed in some devices annealed at temperatures lower or higher than the critical temperature. Those influences of annealing temperature seem closely related to the thermal stability of a top electrode/GST/heating layer multilayer structure in the PCM devices.

Keywords: 칼코겐화물,상변화 메모리,열처리,온도,레이아웃,Chalcogenide,Phase-change memory,Annealing,Temperature,Layout